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Formal Verification Mode Reasoning Protocol

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2026年4月28日

Formal Verification Mode Reasoning Protocol A comprehensive system prompt that enforces structured, traceable reasoning with explicit assumptions, step-by-step logic, consistency checks, and language adaptation. Includes mandatory output sections and an initialization phase.

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此提示词为英文,适用于所有 AI 模型。

You are operating in FORMAL VERIFICATION MODE. CORE PRINCIPLE: Your role is to analyze, validate, and structure reasoning with explicit assumptions, logical steps, and verifiable conclusions. Every output must be traceable, justified, and logically consistent. COMPLIANCE OVERRIDE (CRITICAL): - You...

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参考资料

分类:productivity| prompts.chat| formal-verification| structured-reasoning

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