David Patterson is an American computer scientist and professor emeritus at the University of California, Berkeley. He is best known for pioneering reduced instruction set computer (RISC) architecture and for his influential textbooks on computer architecture. In 2017, Patterson received the ACM A.M. Turing Award jointly with John Hennessy for their work on RISC processors, and he later contributed to the development of Google's Tensor Processing Unit (TPU).
Patterson's research has shaped modern computing, from the design of microprocessors to the acceleration of AI workloads. His work on RISC principles led to the widespread adoption of this architecture in smartphones, embedded systems, and data centers. His later involvement with the Google Cloud TPU project demonstrated the importance of domain-specific architectures for machine learning and deep learning applications.
Early life and education
Patterson was born in 1947 in Evergreen Park, Illinois. He received his bachelor's degree in mathematics from UCLA in 1969, followed by a master's degree and Ph.D. in computer science from UCLA in 1970 and 1976, respectively. His doctoral work focused on computer architecture, laying the foundation for his later contributions.
Academic career and RISC revolution
In 1976, Patterson joined the faculty at the University of California, Berkeley, where he spent most of his academic career. In the early 1980s, he led the RISC project, which demonstrated that a simpler, streamlined instruction set could outperform complex instruction set computers (CISC). The RISC design principles, such as load-store architecture and fixed-length instructions, became the basis for many commercial processors, including those from ARM Holdings and Intel.
Patterson co-authored the seminal textbook "Computer Organization and Design" with John Hennessy, which has educated generations of computer scientists. His research also contributed to the development of RAID (redundant array of inexpensive disks) storage systems, which are now ubiquitous in data centers.
Google TPU and domain-specific architectures
After retiring from Berkeley in 2016, Patterson joined Google as a distinguished engineer. He co-led the design of the Tensor Processing Unit (TPU), an application-specific integrated circuit (ASIC) optimized for neural network inference and training. The TPU was first deployed in 2015 and became a cornerstone of Google's AI infrastructure, powering services like OpenAI's competitors and large language models.
Patterson's work on TPUs highlighted the benefits of domain-specific architectures, which tailor hardware to specific workloads. This approach has influenced the broader industry, with companies like NVIDIA and AMD developing specialized AI accelerators.
Awards and recognition
Patterson has received numerous awards, including the 2017 ACM A.M. Turing Award, the 2004 IEEE John von Neumann Medal, and the 2016 ACM-IEEE CS Eckert-Mauchly Award. He is a fellow of the ACM, IEEE, and the American Academy of Arts and Sciences. In 2020, he was elected to the National Academy of Engineering.
Legacy and impact
Patterson's contributions have fundamentally changed the design of computer systems. His advocacy for open instruction set architectures, such as RISC-V, has democratized processor design, enabling innovation in semiconductor manufacturing and cloud computing. His work on TPUs has accelerated the adoption of AI, influencing generative AI and transformer models.
Patterson continues to be an influential voice in the computing community, speaking on the future of hardware and AI. His career exemplifies the impact of combining academic research with industrial application.